SynaptiCAD

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SynaptiCAD AllProducts

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SynaptiCAD.AllProducts.v11.13b

SynaptiCAD AllProducts v11.13b

* VeriLogger Pro
* Waveformer Pro
* DataSheet Pro
* TimingDiagrammer Pro

Want a powerful, yet easy to use simulation environment? SynaptiCAD's simulation and debugging tools provide a standard interface for controlling all of your simulation tools.

* VeriLogger Extreme: high-performance compiled-code Verilog 2001 simulator
* BugHunter Pro: graphical debugger for all HDL simulators
* Gigawave Viewer: VCD/SPICE waveform viewer

SynaptiCAD's timing diagram editors have the most extensive and accurate timing analysis features available in any timing diagram editor on the market including delay correlation, reconvergent fan-out, and clocks that model jitter and buffer delays. Three different levels of editing let you pick the best price and feature set for your application:

* DataSheet Pro: professional data sheet editor
* WaveFormer Pro: timing diagram editor + waveform translator
* Timing Diagrammer Pro: timing diagram editor

DataSheet Pro provides the ultimate environment for documentation professionals working with multi-diagram projects. Datasheet Pro's project management features allow users to efficiently combine diagrams from multiple engineers into one project with uniform formatting. Using Object Linking and Embedding (OLE), users can embed timing diagrams into other publishing programs. These images can be edited at any time directly from the publishing program by double clicking on the image to launch DataSheet Pro with the selected timing diagram. Other features include style sheets, view support, web-ready image generation, analog waveform import and display, and support for the industry-standard Timing Diagram Markup Language (TDML) format. Documentation professionals will be able to receive timing diagrams produced by design engineers using any TDML-compatible product, such as WaveFormer Pro or Timing Diagrammer Pro, and embed them directly into publishing programs like FrameMaker and Word.

Free yourself from the time-consuming process of manually writing Verilog, VHDL, and SystemC test benches. Generate them graphically from timing diagrams. SynaptiCAD provides 3 levels of test bench generation to meet all your design needs.

* TestBencher Pro for system-level, transaction-based test benches
* WaveFormer Pro with reactive test bench generation
* WaveFormer Pro for stimulus-only test benches
* VeriLogger Extreme and BugHunter Pro also support test bench generation.

More Information :
http://www.syncad.com/

Download: 67.10 MB [APP + FIX]
http://rapidshare.com/files/12373624/ac-syb3.rar

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SynaptiCAD AllProducts v11.13b
http://rapidshare.com/files/22197906...ts_v11.13b.rar

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SynaptiCAD Product Suite_14.02a

SynaptiCAD: Timing diagram editors and Verilog VHDL verification tools
SynaptiCAD was founded by electrical engineers to create design tools that helped engineers think critically about their designs. Being engineers themselves, they were frustrated by having to almost complete a design before being able to get simulation results. Our founders decided that there must be a better approach for interacting with design tools and from this simple idea they created SynaptiCAD, a company that creates “tools for the thinking mind”. This idea permeates all of our tool interfaces. With SynaptiCAD’s tools you are able to begin analyzing and simulating design ideas right away without having to complete an entire circuit model or schematic. Our tools automatically handle many of the minor details involved in the design effort, leaving you more time to focus on the bigger picture.

http://www.megaupload.com/?d=RPZGCTP1 (84.18 MB.)